Vector Class Discussion

I'd like to know if there is any plan on extending this library to the Xeon Phi instruction set ?
And by the way, do you plan to extend your optimization books to this architecture ?

Thanks.

Kind regards,
Wilfried K.

AVX-512 will run both on the MIC coprocessors and the mainstream CPUs. My plan is to support AVX-512 when it is available in mainstream CPUs and supported by the major compilers.

I think that the ABI standards (function calling conventions) are not completely fixed yet and AVX-512 has some problems with preparing for future extensions (see software.intel.com/en-us/forums/topic/477541 ) so it will take some time before everything is in place.

I have started to write some vector classes for the MIC, sticking as much as possible to the design and interface of the other vector classes. I wrote the code for use in projects of my own, but I will be happy to contribute it if there is any interest.

It only supports basic operations on Vec8d, Vec16i, Vec8b and Vec16b for now, does not support dynamic dispatching (which I do not think is such an issue as the MIC is not binary compatible with mainline x86 anyways), is not production-quality and has no documentation. But it might be enough to get started and add the missing features along the way.

Hopefully, AVX-512 intrinsics should be close to those of Xeon Phi, even though the instruction encodings are different. I expect most of the work for supporting Xeon Phi would apply to AVX-512, with minor modifications for dispatching and adapting to ISA idiosyncrasies.

Regards,
Sylvain

I am very interested in getting vector class to work with the MIC (Phi) intrinsics. It sounds like your AVX-512 implementation would be a useful place to start. Would you be willing to share a copy with me?

Thanks,
Jim Amundson