Agner's CPU blog

RISC-V and AVX include instructions for variable bit shifts but not for rotations. What is the reason for this? Are variable rotations more expensive to implement in hardware than variable shifts? RISC-V has the bitmanip extension ( https://raw.githubusercontent.com/riscv/riscv-bitmanip/master/bitm...

In the long run, this will hurt Intel, since it will drive customers away from their compilers. Given AMD's new Zen CPUs, anyone investigating their use will switch to gcc or clang for compilation, rather than Intel. I know Google switched their C++ compilation to clang more than two years ago. (The...