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treating stack ISA as CISC architecure
Author:  Date: 2016-04-18 08:09
Well..., I forgot explaining why the bottom item of Parser stack can hold Hyperblock and other items can't.
Forgive me adding a loaf of explanation below.

-- begin --
(1-op)
If next instruction is a N-in-1-out (inc, add, fma3, etc) or N-in-0-out ("store [sp+2] top-of-stack", etc) micro op
[1] Pop N items from Parser stack, concatenate them with the next instruction into a Hyperblock.
ex.
Parser stack before : { [sp+3] ; $4 ; add } ; $5
next instruction : add(2-in-1-out op)
Hyperblock : { [sp+3] ; $4 ; add ; $5 ; add }
Parser stack after [1] : (empty)
[2] If items remain in Parser stack, output each of them as individual Hyperblock.
[3-1out] If next instruction is 1-out op, leave the Hyperblock made at [1] on the bottom of Parser stack.
ex.
Parser stack after [2] : { [sp+3] ; $4 ; add ; $5 ; add }
-- end --

Thanks for Reverse Polish Notation, you feel free replacing a constant value into an instruction sequence which provides a value.
ex.
$4 ; $3 ; add
can be replaced into
($2 ; $2 ; add) ; ($9 ; $3 ; div) ; add
and more
(($5 ; $3 ; $-13 ; fma3) ; ($1 ; $1 ; add) ; add) ; (($5 ; $4 ; add) ; (return-three-func-addr ; call-from-addr) ; div) ; add
and so on.
But since each instruction sequence has no dependency on others, replacing more than one value give a Hyperblock more than one flow.
I want to avoid concurrent flow in a Hyperblock, thus the recipe allows only one item in Parser stack to hold a Hyperblock.

 
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