Agner`s CPU blog

I think that it would be better to have 32 scalar registers and 32 vector registers. I do not think that this implies any significant changes in the instruction encoding that you have in mind.

This would certainly simplify the task of the operating system and of the interrupt routines to decide which registers should be saved.

This would certainly also make easier any extension to much longer vectors. I have seen several opinions on the Internet, and I agree with them, that many features of the ISA's used by Cray and by a few other vector processors were actually much more convenient to exploit in software than the current MMX/SSE/AVX style of vector instructions.

In conclusion, I believe that separate scalar & vector registers would be simpler to use, because the scalar registers, having a known length, can be saved in a predictable way, without examining any state registers. You could make a sophisticated save unit that to would save only the non-null parts of the vector registers, but it would insert an unpredictable delay that would not be acceptable for interrupt routines.

Moreover, any program already has distinct scalar & array variables, so mapping them to scalar & vector registers is trivial.

Like I said, I also think that a reading of the old Cray manuals that are freely available, e.g. at

bitsavers.informatik.uni-stuttgart.de/pdf/cray/

and the comparison of their vector instructions with AVX-512 to see what is best between themselves and how they can be extended to greater vector lengths, could be useful to improve your ISA proposal.