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Micro-fusion limited to 1-reg addressing modes
Author: Agner Date: 2015-07-12 00:42
Peter Cordes wrote:
uop micro-fusion on Intel SnB seems to be possible only when it doesn't create uops with more than 2 input dependencies.
Thanks for the info and the link. I haven't tested uop fusion on Intel processors since the uop cache was introduced, so it may be that this is a drawback of the uop cache. I don't have the time to test it right now, but I will add a test for uop fusion next time I update my test scripts.

Have you tried with FMA instructions?

 
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