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Multithreads load-store throughput for bulldozer

Author: Bigos	Date: 2014-06-28 02:46
What about L2 cache? Since L1D is a write-through design, any write to this cache will be automatically written to L2, which is shared between cores in a module. Of course there is a coalescing buffer, but IIUC it is meant to coalesce scattered writes to different addresses into a single transaction. In your program, you only write to a single address, so it's not effective.

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